ARM ProcessorΒΆ

Interface: armsim.interfaces.armprocessor.IARMProcessor

This interface defines the ARM processor

Attribute: r14_und
Undefined mode R14 register
Attribute: r13_fiq
FIQ mode R13 register
Attribute: r14_fiq
FIQ mode R14 register
Attribute: r14_abt
Abort mode R14 register
Attribute: cpsr
CPSR Status register
Attribute: r13_abt
Abort mode R13 register
Attribute: spsr_fiq
FIQ mode SPSR status register
Attribute: r11_fiq
FIQ mode R11 register
Attribute: r14_svc
Supervisor mode R14 register
Attribute: memory
Processor memory buffer
Attribute: spsr_svc
Supervisor mode SPSR status register
Attribute: r13_svc
Supervisor mode R13 register
Attribute: r9_fiq
FIQ mode R9 register
Attribute: r14
R14 register, holds SP
Attribute: r15
R15 register, holds PC
Attribute: r12
R12 register
Attribute: r13
R13 register
Attribute: r10
R10 register
Attribute: r11
R11 register
Attribute: r10_fiq
FIQ mode R10 register
Attribute: spsr_abt
Abort mode SPSR status register
Attribute: r8_fiq
FIQ mode R8 register
Attribute: r4
R4 register
Attribute: r5
R5 register
Attribute: r6
R6 register
Attribute: r7
R7 register
Attribute: r0
R0 register
Attribute: r1
R1 register
Attribute: r2
R2 register
Attribute: r3
R3 register
Attribute: spsr_und
Undefined mode SPSR status register
Attribute: r13_und
Undefined mode R13 register
Attribute: r8
R8 register
Attribute: r9
R9 register
Attribute: spsr_irq
IRQ mode SPSR status register
Attribute: r12_fiq
FIQ mode R12 register
Attribute: r14_irq
IRQ mode R14 register
Attribute: r13_irq
IRQ mode R13 register
Method: mode()
Shortcut to statusFlag(‘M’)
Method: halt()
Pauses execution

Method: resume()

Resumes execution at current PC, you can use this method along with halt to debug, and change register values at runtime Example: >>>processor.halt() >>>processor.r0 45L >>>processor.r0 = 15 >>>processor.resume()

Method: statusFlag(flag)

Returns the value of a status flag, values allowed to the flag variable are: ‘M’ for mode ‘T’ for thumb instruction set (altough this isn’t supported) ‘J’ for Jazzelle instruction set (it isn’t supported yet)

You can read about the rest of the bits in the ARM Architecture Manual ‘F’ ‘I’ ‘A’ ‘E’ ‘GE’ ‘Q’

and condition code flags: ‘V’ oVerflow ‘C’ Carry ‘Z’ Zero ‘N’ Negative

Method: initMemory(size)
Initializes the memory to the size of the parameter passed
Method: reset()
Resets the processor, CAUTION registers are not erased

Method: step()

Jumps to the next instruction, processor automatically executes this after a fetch

Method: setStatusFlag(flag, value)

Used to change status flags, values allowed to the flag variable are: ‘M’ for mode ‘T’ for thumb instruction set (altough this isn’t supported) ‘J’ for Jazzelle instruction set (it isn’t supported yet)

You can read about the rest of the bits in the ARM Architecture Manual ‘F’ ‘I’ ‘A’ ‘E’ ‘GE’ ‘Q’

and condition code flags: ‘V’ oVerflow ‘C’ Carry ‘Z’ Zero ‘N’ Negative

Method: printStatus()
Prints execution state, current PC and value of all registers
Method: fetch()
Looks for the next instruction and returns it

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